A digital logic circuit, generally formed as a cascade of separate logic functions, is a circuit that produces a digital output as a result of some logical operation on its digital inputs. Digital logic circuits are typically implemented on various types of integrated semiconductor chips. One widely known type of integrated chip is the Application Specific Integrated Circuit (ASIC), which is a custom-made integrated chip. Each ASIC is manufactured to implement a specific digital logic circuit.
Programmable Logic Devices (PLDs) are another type of integrated chip, but differ from ASICs because of their ability to implement any number of different complex digital logic circuits by configuring the underlying integrated chip. For implementing an end product, the programmable integrated chips are less costly, usually in a limited volume, than ASICs because a large volume of identical programmable integrated chips may be manufactured from a single design, which can later be configured to implement a wide variety of digital logic circuits for different end customers. Therefore, the cost of design and manufacturing is distributed over a large number of identical integrated chips that can implement a large number of end designs.
An FPGA is one type of PLD that can either be permanently or temporarily programmed by the user. Typically, an FPGA consists of an array of modularized logic units and interconnection resources, such as presented in U.S. patent application Ser. No. 60/578,597, filed Jun. 10, 2004. It is an array of uncommitted gates with uncommitted wiring channels. Each logic unit can be programmed to implement any particular logic function. Various digital circuits may be implemented to execute desired functions by configuring or programming a number of logic blocks and interconnecting them using programmable interconnection resources. A programmable gate array circuit can be programmed to implement virtually any set of functions.
A function is implemented in a PLD by setting the states of programmable elements such as memory cells that set the functionality of the circuit. These memory cells may be implemented with volatile memories, such as static random access memories (SRAMs), which lose their programmed states upon termination of power to the system, or with nonvolatile memories, such as erasable-programmable read only memories (EPROMs), Flash memories, or electrically erasable-programmable read only memories (EEPROMs), which retain their contents upon termination of power. If the programmable elements used are volatile memories, the memory cells must be reconfigured upon system power-up in order to restore the PLD to the desired programmed and functional state.
As integrated circuit technology and semiconductor processing continue to advance, there is a need for greater densities and functionality in integrated circuits, which are often determined in large part by the size of the memory cells used to create the circuit. Further, it is desirable that the memory cells have improved operating characteristics, such as lower power consumption, nonvolatility, greater device longevity, improved data retention, better transient performance, superior voltage and current attributes, and improvements in other similar attributes. Memory cells may be used to programmably control the composition, configuration, arrangements, and also the interconnections of logic array blocks and logic elements. Many different memory cell technologies may be used including DRAM, SRAM, EPROM, EEPROM, Flash, and antifuse, among others. Typically, an ideal technology for storing the configuration information of the PLD should be compact, power efficient, programmable, infinitely reprogrammable, infinitely reconfigurable, and nonvolatile, require little additional programming circuitry overhead and generally provide enhancements to the performance and features of PLD logic modules and interconnections.
The prior art and the present mainstream commercial FPGAs have either employed a volatile or a nonvolatile technology, each of which has its own disadvantages that cannot be overcome except by switching to the other technology. For example, in the case of a power interruption, the memory cells using volatile technology need their information to be restored and reconfigured; have a slower power-up time than the ones with nonvolatile technology; need a higher standby power; and typically require external intelligence for configuration. Likewise, the memory cells using nonvolatile technology are not infinitely reconfigurable, require nonstandard semiconductor processes, have a slow programming or “write” capability, and may not be testable during the manufacturing.